Field of the Invention
The present invention relates to methods and control apparatus usable, for example, in the manufacture of devices by patterning processes such as lithography. The invention further relates to methods of manufacturing devices using lithographic techniques. The invention yet further relates to computer program products for use in implementing such methods.
Background Art
A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (also referred to as a “field” e.g., including part of, one, or several dies) on a substrate (e.g., a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned.
In a high volume manufacturing environment, many batches or “lots” of substrates may be processed through the lithographic apparatus in the course of an hour or a day. Each lot comprises wafers of a particular product, and the apparatus applies a pattern appropriate for a particular layer in that product under layer-specific operating conditions. On the other hand, the lots processed in the day or in an hour may comprise a diverse mixture of different product and/or layer types. In order to achieve optimal performance of the lithographic process in each device, very accurate control of the imaging process, both in terms of positioning the patterns and creating the patterns in a resist layer, is required. In modern products, extremely tight specifications for performance parameters such as overlay and critical dimension (CD) are established, and each new generation of product requires ever tighter specifications. During processing of the substrates, many measurements and corrections are made to achieve the required performance. Many of these corrections are specific to a particular layer. On the other hand, all the lots and substrates within the lots are subject to errors caused by thermal behaviors within the substrate and within other components of the lithographic apparatus.
Although thermal models have been established which attempt to model and compensate for thermally-induced distortions, the distortions experienced by different substrates within different lots are not the same, even for the same layer type and for the same operating conditions. One reason for this is that heating effects build and dissipate within components of the apparatus, within the patterning device, and within the substrate and the substrate support, over timescales that are longer than the processing of an individual wafer, or even an individual lot. Consequently, in an environment where a diverse range of different lot types are being processed through the same lithographic apparatus, thermal effects are simply too unpredictable to be corrected by known techniques. Although it is recognized that performance in one lot can be influenced by thermal characteristics lingering from the processing of previous lots, the systematic approach to sequencing a collection of lots to minimize such errors has been seen before now.